・Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Yasuhiro Takahashi (Gifu Univ.), Daisuke Ito (Gifu Univ.), and
Makoto Nakamura (Gifu Univ.)：
A 16-Channel Optical Receiver Circuit for a Multicore Fiber-Based
Co-Packaged Optics Module in a 65-nm CMOS Chip
IEEE Transactions on Circuits and Systems II: Express Briefs
vol. 71, no. 5, pp. 2514-2518, May 2024
・Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito (Gifu Univ.), Yasuhiro Takahashi (Gifu Univ.), and
Makoto Nakamura (Gifu Univ.)：
A burst-mode receiver with quick response and high consecutive identical digit tolerance for advanced
intra-vehicle optical networks
Microelectronics Journal
vol. 145, p. 106-120, March 2024
・Ukyo Yoshimura, Toshiyuki Inoue, Akira Tsuchiya, and Keiji Kishine：
A Method for Accelerating the Inference Process of FPGA-based LSTM for Biometric Systems
IEIE Transactions on Smart Processing & Computing (IEIE SPC)
vol. 10, no. 5, pp. 416-423, October 2021
・Kenta Nishiguchi, Toshiyuki Inoue, Rei Yamazaki, Kazunori Ogohara, Akira Tsuchiya, and Keiji Kishine：
Dynamic Memory Access Control for Accelerating FPGA-based Image Processing
IEIE Journal of Semiconductor Technology and Science (IEIE JSTS)
vol. 21, no. 1, pp. 29-38, February 2021
・Akira TSUCHIYA, Akitaka HIRATSUKA, Kenji TANAKA, Hiroyuki FUKUYAMA, Naoki MIURA, Hideyuki
NOSAKA, Hidetoshi ONODERA：
Design of a 45 Gb/s, 98 fJ/bit, 0.02 mm2 Transimpedance Amplifier with Peaking-Dedicated Inductor in
65-nm CMOS
IEICE Transactions on Electronics
vol. E103-C, no. 10, pp. 489-496, October 2020
・Toshiyuki Inoue, Akira Tsuchiya, and Keiji Kishine：
Design method for active-shunt-feedback type inductorless low-noise amplifiers in 65-nm CMOS
IEIE Journal of Semiconductor Technology and Sceience(IEIE JSTS)
vol. 20, no. 2, pp. 177-186, April 2020
・Toshiyuki Inoue, Kohei Nomura, Ryosuke Noguchi, Natsuyuki Koda, Akira Tsuchiya, and Keiji Kishine：
FPGA-based binary labeling signal transmission system
IEIE Journal of Semiconductor Technology and Sceience(IEIE JSTS)
vol. 19, no. 3, pp. 276-286, June 2019
・Hiromu Uemura, Kosuke Furuichi, Natsuyuki Koda, Hiromi Inaba, and Keiji Kishine：
10-Gb/s Data Frame Generation Circuit with Frequency Modulation in 65-nm CMOS
IEIE Journal of Semiconductor Technology and Sceience
vol. 18, no. 2, pp. 238-245, April 2018
・Natsuyuki Koda, Kosuke Furuichi, Hiromu Uemura, Hiromi Inaba, and Keiji Kishine：
Simple and Low Power Highly Sensitive Frequency Demodulator Circuit for 10-Gb/s Transmission System
for Labeling Signal
IEIE Journal of Semiconductor Technology and Sceience(IEIE JSTS)
vol. 17, no. 6, pp. 733-741, December 2017
・Kosuke Furuichi, Hiromu Uemura, Natsuyuki Koda, Hiromi Inaba, and Keiji Kishine：
Design of High-linearity Delay Detection Circuit for 10-Gb/s Communication System in 65-nm CMOS
IEIE Journal of Semiconductor Technology and Sceience(IEIE JSTS)
vol. 17, no. 6, pp. 742-749, December 2017
・Tomoki Tanaka, Keiji Kishine, Akira Tsuchiya, Hiromi Inaba, and Daichi Omoto：
A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis
in 65-nm CMOS
IEIE Transactions on Smart Processing and Computing(IEIE SPC)
vol. 5, no. 3, pp. 207-214, June 2016
・Daichi Omoto, Keiji Kishine, Hiromi Inaba, and Tomoki Tanaka：
Simple Routing Control System for 10 Gb/s Data Transmission Using a Frequency
Modulation Technique
IEIE Transactions on Smart Processing and Computing(IEIE SPC)
vol. 5, no. 3, pp. 199-206, June 2016
・Keiji Kishine; Hiromi Inaba; Hiroshi Inoue; Makoto Nakamura; Akira Tsuchiya; Hiroaki Katsurai;
Hidetoshi Onodera：
A Multi-Rate Burst-Mode CDR Using a GVCO With Symmetric Loops for Instantaneous Phase Locking in
65-nm CMOS
IEEE Transactions on Circuits and Systems I: Regular Papers
vol. 62, no. 5, pp. 1288-1295, May 2015
・Takuma Ito, Hiromi Inaba, Keiji Kishine, Mitsuki Nakai, Keisuke Ishikura：
Method Controlling Four Sets of Permanent Magnet Synchronous Motor by One Inverter on a Railway
Vehicle
Journal of International Conference on Electrical Machines and Systems
(JICEMS)
vol. 3, no. 4, pp.403-408, December 2014
・Keisuke Ishikura, Hiromi Inaba, Keiji Kishine, Mitsuki Nakai, Takuma Ito：
System Construction Method of Parallel Operation System Constructed with
Three Electric Power
Converters
Journal of International Conference on Electrical Machines and Systems
(JICEMS)
vol. 3, no. 4, pp.451-457, December 2014
・Mitsuki Nakai, Hiromi Inaba, Keiji Kishine, Keisuke Ishikura：
Parallel Multiple Electric Power Conversion System Constructed by Connecting Three Power Converters
Journal of International Conference on Electrical Machines and Systems
(JICEMS)
vol. 3, no. 3, pp.276-281, September 2014
・Keisuke Ishikura, Hiromi Inaba, Keiji Kishine, Mitsuki Nakai, Takuma Ito：
Simulation Analysis of Control Methods for Parallel Multi-Operating System Constructed
by the Same Output Power Converters
Journal of International Conference on Electrical Machines and Systems
(JICEMS)
vol. 3, no. 3, pp.282-288, September 2014
・Takuma Ito, Hiromi Inaba, Keiji Kishine, Mitsuki Nakai, Keisuke Ishikura：
Method Controlling Two or More Sets of PMSM by One Inverter on a Railway Vehicle
Journal of International Conference on Electrical Machines and Systems
(JICEMS)
vol. 3, no. 2, pp.207-214, June 2014